Eia/Standard Frequency Assignments Discovery

John A. Siemon, The Siemon Co.

Now that the Telecommunications Industry Association TR41.8.l working group on telecommunications cabling has successfully published standard TIA/EIA-568-A, numerous issues that have surfaced as a result of its ongoing efforts should be addressed. Last October, a special planning meeting was held to discuss these open issues and to formulate recommendations on a strategic plan to address them. During this meeting, each pending technical issue was assigned to one of three classifications. These classifications relate to their importance and the manner with which resulting specifications will be conveyed to the industry:

Critical technical issues

The following topics are pending investigation by members or task groups of TR41.8.1. Because of their critical technical nature, the approved technical resolutions for many of these issues will likely be released in the form of an addendum to TIA/EIA-568-A.

Short link resonance. Investigations of field transmission measurements on twisted-pair links has resulted in the discovery of a new phenomenon known as Oshort link resonance.O This resonance effect is characterized by peaks in near-end crosstalk performance at periodic intervals throughout the frequency range of testing. In links of short lengths, these peaks have been found to result in failure of the basic-link crosstalk requirements specified in TIA/EIA Technical Systems Bulletin 67, or TSB. The TR41.8.1 working group?s top priority is explaining and resolving this phenomenon.

[Native Advertisement]

Hybrid-cable transmission requirements. Open office cabling and the need to support multiple telecommunications applications in a shared sheath have resulted in increased demand for hybrid cables. As a result, the hybrid-cable requirements that appear in both the 1991 and the 1995 editions of TIA/EIA-568 have come under increased scrutiny.

Unshielded twisted-pair cable and connecting hardware issues. Among the topics under investigation are test methods and requirements for balance and various harmonization issues with the International Standards Organization/International Electrotechnical Commission 11801 standard. Revision of the low-frequency limit for cable attenuation, clarification for temperature testing and restrictions on reversals/pair transpositions are also pending.

STP-A cable and connecting hardware issues. Among the topics under investigation are characteristic impedance, attenuation and near-end crosstalk temperature range for STP-A, or shielded twisted-pair, cables. Connector resistance and link performance requirements for the cabling type are also open.

Ongoing standards development

The following issues require development of new technical matter that will likely be released in the form of Interim Standards or TSBs. (Note that a TSB is an informative bulletin and not a standard.)

Y Technical specifications for 100-ohm patch cords. This draft TSB is being developed by the PN-2948 task group and will specify test methods and requirements for patch cord assemblies.

Y Technical specifications for 100-ohm STP cabling. This draft TSB is being developed by the PN-3193 task group. It will build on TIA/EIA-568-A by specifying additional technical requirements on shield effectiveness, installation practices and link performance relative to cabling with an overall shield.

Y Additional practices for open-office cabling. This draft TSB was developed by the PN-3398 task group. It specifies horizontal cabling methodologies in open-office environments by means of multiuser telecommunications outlets and consolidation points. Ballot is pending.

Y Additional cable requirements. Items under consideration are far-end crosstalk, balance and velocity of propagation. Specifications for testing channels and links that cover component characteristics, test methods, modeling, verification and link characteristics will also be addressed.

The third classification includes issues to be addressed in the third edition of the Commercial Building Telecommunications Cabling Standard, TIA/EIA-568-B, which will be covered in the TIA update next month.

John A. Siemon is vice president, engineering, at The Siemon Co. (Watertown, CT) and has been active in TIA?s engineering committee, TR-41.8, and its working groups since 1986. He is on the steering committee for the development of Revision B of TIA/EIA-568-A and also serves as the vice chair of the U.S. advisory group for international cabling standards.

Extended Display Identification Data (EDID) is a metadata format for display devices to describe their capabilities to a video source (e.g. graphics card or set-top box). The data format is defined by a standard published by the Video Electronics Standards Association (VESA).

EDID data structure includes manufacturer name and serial number, product type, phosphor or filter type, timings supported by the display, display size, luminance data and (for digital displays only) pixel mapping data.

DisplayID is a VESA standard targeted to replace EDID and E-EDID extensions with a uniform format suited for both PC monitor and consumer electronics devices.

Background[edit]

EDID structure versions range from v1.0 to v1.4; all these define upwards-compatible 128-byte structures. EDID structure v2.0 defined a new 256-byte structure, but subsequently has been deprecated and replaced by v1.3 which support multiple exension blocks.[citation needed]HDMI versions 1.0–1.3c use EDID structure v1.3.[1]

Before Display Data Channel (DDC) and EDID were defined, there was no standard way for a graphics card to know what kind of display device it was connected to. Some VGA connectors in personal computers provided a basic form of identification by connecting one, two or three pins to ground, but this coding was not standardized.

The channel for transmitting the EDID from the display to the graphics card is usually the I²C-bus, defined in DDC2B (DDC1 used a different serial format which never gained popularity).

The EDID is often stored in the monitor in a memory device called a serial PROM (programmable read-only memory) or EEPROM (electrically erasable PROM) and is accessible via the I²C-bus at address 0x50.[2] The EDID PROM can often be read by the host PC even if the display itself is turned off.

Many software packages can read and display the EDID information, such as read-edid[3] for Linux and DOS, PowerStrip[4] for Microsoft Windows and XFree86 for Linux and BSD unix. Mac OS X natively reads EDID information and programs such as SwitchResX[5] or DisplayConfigX[6] can display the information as well as use it to define custom resolutions.

Enhanced EDID was introduced at the same time as E-DDC; it introduced EDID structure version 1.3 which supports multiple extensions blocks and deprecated EDID version 2.0 structure (although it can be supported as an extension). Data fields for preferred timing, range limits, and monitor name are required in E-EDID. E-EDID also supports dual GTF timings and aspect ratio change.[clarification needed]

With the use of extensions, E-EDID string can be lengthened up to 32 KBytes.

EDID Extensions assigned by VESA[edit]

  • Timing Extension (00h)
  • Additional Timing Data Block (CEA EDID Timing Extension) (02h)
  • Video Timing Block Extension (VTB-EXT) (10h)
  • EDID 2.0 Extension (20h)
  • Display Information Extension (DI-EXT) (40h)
  • Localized String Extension (LS-EXT) (50h)
  • Microdisplay Interface Extension (MI-EXT) (60h)
  • Display Transfer Characteristics Data Block (DTCDB) (A7h, AFh, BFh)
  • Block Map (F0h)
  • Display Device Data Block (DDDB) (FFh)
  • Extension defined by monitor manufacturer (FFh): According to LS-EXT, actual contents varies from manufacturer. However, the value is later used by DDDB.

Revision history[edit]

  • August 1994, DDC standard version 1 – EDID v1.0 structure.
  • April 1996, EDID standard version 2 – EDID v1.1 structure.
  • 1997, EDID standard version 3 – EDID structures v1.2 and v2.0
  • February 2000, E-EDID Standard Release A, v1.0 – EDID structure v1.3, EDID structure v2.0 deprecated
  • September 2006 – E-EDID Standard Release A, v2.0 – EDID structure v1.4

Limitations[edit]

Some graphics card drivers have historically coped poorly with the EDID, using only its standard timing descriptors rather than its Detailed Timing Descriptors (DTDs). Even in cases where the DTDs were read, the drivers are/were still often limited by the standard timing descriptor limitation that the horizontal/vertical resolutions must be evenly divisible by 8. This means that many graphics cards cannot express the native resolutions of the most common wide screenflat panel displays and liquid crystal display televisions. The number of vertical pixels is calculated from the horizontal resolution and the selected aspect ratio. To be fully expressible, the size of wide screen display must thus be a multiple of 16×9 pixels. For 1366×768 pixel Wide XGA panels the nearest resolution expressible in the EDID standard timing descriptor syntax is 1360×765 pixels, typically leading to 3 pixel thin black bars. Specifying 1368 pixels as the screen width would yield an unnatural screen height of 769.5 pixels.

Many Wide XGA panels do not advertise their native resolution in the standard timing descriptors, instead offering only a resolution of 1280×768. Some panels advertise a resolution only slightly smaller than the native, such as 1360×765. For these panels to be able to show a pixel perfect image, the EDID data must be ignored by the display driver or the driver must correctly interpret the DTD and be able to resolve resolutions whose size is not divisible by 8. Special programs are available to override the standard timing descriptors from EDID data. Even this is not always possible, as some vendors' graphics drivers (notably those of Intel) require specific registry hacks to implement custom resolutions, which can make it very difficult to use the screen's native resolution.[7]

EDID 1.4 data format[edit]

BytesDescription
0–19Header information
0–7Fixed header pattern:
8–9Manufacturer ID. This is a legacy Plug and Play ID assigned by Microsoft, which is a big-endian 16-bit value made up of three 5-bit letters: 00001=A, 00010=B, ... 11010=Z. E.g. 24 4d = 001001 0001001101 = "IBM".
Bit 15(Reserved, always 0)
Bits 14–10First letter of manufacturer ID (byte 8, bits 6–2)
Bits 9–5Second letter of manufacturer ID (byte 8, bit 1 through byte 9 bit 5)
Bits 4–0Third letter of manufacturer ID (byte 9 bits 4–0)
10–11Manufacturer product code. 16-bit number, little-endian.
12–15Serial number. 32 bits, little endian.
16Week of manufacture, or model year flag. Week numbering is not consistent between manufacturers.
17Year of manufacture, less 1990 (1990–2245). If week=255, it is the model year instead.
18EDID version, usually 1 (for 1.3)
19EDID revision, usually 3 (for 1.3)
20–24Basic display parameters.
20Video input parameters bitmap
Bit 7=1Digital input. If set, the following bit definitions apply:
Bits 6–4Bit depth: 000=undefined, 001=6, 010=8, 011=10, 100=12, 101=14, 110=16 bits per color, 111=reserved
Bits 3–0Video interface: 0000=undefined, 0001=HDMIa, 0010=HDMIb, 0100=MDDI, 0101=DisplayPort
Bit 7=0Analog input. If clear, the following bit definitions apply:
Bits 6–5Video white and sync levels, relative to blank: 00=+0.7/−0.3 V; 01=+0.714/−0.286 V; 10=+1.0/−0.4 V; 11=+0.7/0 V
Bit 4Blank-to-black setup (pedestal) expected
Bit 3Separate sync supported
Bit 2Composite sync (on HSync) supported
Bit 1Sync on green supported
Bit 0VSync pulse must be serrated when composite or sync-on-green is used.
21Horizontal screen size, in centimetres (range 1-255). If vsize=0, landscape aspect ratio (range 1.00-3.54), datavalue = (AR×100)-99 (example: 16:9 = 79, 4:3 = 34)
22Vertical screen size, in centimetres. If hsize=0, portrait aspect ratio (range 0.28-0.99), datavalue = (100/AR)-99 (example: 9:16 = 79, 3:4 = 34). If either byte is 0, screen size and aspect ration are undefined (e.g. projector)
23Display gamma, factory default (range 1.00–3.54), datavalue = (gamma×100)-100 = (gamma−1)×100. If 225, gamma is defined by DI-EXT block.
24Supported features bitmap
Bit 7DPMS standby supported
Bit 6DPMS suspend supported
Bit 5DPMS active-off supported
Bits 4–3Display type (digital): 00 = RGB 4:4:4; 01 = RGB 4:4:4 + YCrCb 4:4:4; 10 = RGB 4:4:4 + YCrCb 4:2:2; 11 = RGB 4:4:4 + YCrCb 4:4:4 + YCrCb 4:2:2
Bits 4–3Display type (analog): 00 = Monochrome or Grayscale; 01 = RGB color; 10 = Non-RGB color; 11 = Undefined
Bit 2Standard sRGB colour space. Bytes 25–34 must contain sRGB standard values.
Bit 1Preferred timing mode specified in descriptor block 1. For EDID 1.3+ the preferred timing mode is always in the first Detailed Timing Descriptor. In that case, this bit specifies whether the preferred timing mode includes native pixel format and refresh rate.
Bit 0Continuous timings with GTF or CVT
25–34Chromaticity coordinates.
10-bit CIE 1931 xy coordinates for red, green, blue, and white point
25Red and green least-significant bits (2−9, 2−10)
Bits 7–6Red x value least-significant 2 bits
Bits 5–4Red y value least-significant 2 bits
Bits 3–2Green x value least-significant 2 bits
Bits 1–0Green y value least-significant 2 bits
26Blue and white least-significant 2 bits
27Red x value most significant 8 bits (2−1,...,2−8). 0–255 encodes fractional 0–0.996 (255/256); 0–0.999 (1023/1024) with lsbits
28Red y value most significant 8 bits
29–30Green x and y value most significant 8 bits
31–32Blue x and y value most significant 8 bits
33–34Default white pointx and y value most significant 8 bits
35–37Established timing bitmap. Supported bitmap for (formerly) very common timing modes.
35Bit 7720×400 @ 70 Hz (VGA)
Bit 6720×400 @ 88 Hz (XGA)
Bit 5640×480 @ 60 Hz (VGA)
Bit 4640×480 @ 67 Hz (Apple Macintosh II)
Bit 3640×480 @ 72 Hz
Bit 2640×480 @ 75 Hz
Bit 1800×600 @ 56 Hz
Bit 0800×600 @ 60 Hz
36Bit 7800×600 @ 72 Hz
Bit 6800×600 @ 75 Hz
Bit 5832×624 @ 75 Hz (Apple Macintosh II)
Bit 41024×768 @ 87 Hz, interlaced (1024×768i)
Bit 31024×768 @ 60 Hz
Bit 21024×768 @ 72 Hz
Bit 11024×768 @ 75 Hz
Bit 01280×1024 @ 75 Hz
37Bit 71152x870 @ 75 Hz (Apple Macintosh II)
Bits 6–0Other manufacturer-specific display modes
38–53Standard timing information. Up to 8 2-byte fields describing standard display modes.
Unused fields are filled with
Byte 0X resolution, divided by 8, less 31 (256–2288 pixels, value 00 is reserved and should not be used)
Byte 1 bits 7–6Image aspect ratio: 00=16:10; 01=4:3; 10=5:4; 11=16:9.
(Versions prior to 1.3 defined 00 as 1:1.)
Byte 1 bits 5–0Vertical frequency, less 60 (60–123 Hz)
54–71Descriptor 1Descriptor blocks. Detailed timing descriptors, in decreasing preference order. After all detailed timing descriptors, additional descriptors are permitted:
  • Monitor range limits (required)
  • ASCII text (monitor name (required), monitor serial number or unstructured text)
  • 6 Additional standard timing information blocks
  • Colour point data
72–89Descriptor 2
90–107Descriptor 3
108–125Descriptor 4
126Number of extensions to follow. 0 if no extensions.
127Checksum. Sum of all 128 bytes should equal 0 (mod 256).
BytesDescription
0–1Pixel clock in 10 kHz units. (0.01–655.35 MHz, little-endian)
2Horizontal active pixels 8 lsbits (0–4095)
3Horizontal blanking pixels 8 lsbits (0–4095) End of active to start of next active.
4Bits 7–4Horizontal active pixels 4 msbits
Bits 3–0Horizontal blanking pixels 4 msbits
5Vertical active lines 8 lsbits (0–4095)
6Vertical blanking lines 8 lsbits (0–4095)
7Bits 7–4Vertical active lines 4 msbits
Bits 3–0Vertical blanking lines 4 msbits
8Horizontal front porch (sync offset) pixels 8 lsbits (0–1023) From blanking start
9Horizontal sync pulse width pixels 8 lsbits (0–1023)
10Bits 7–4Vertical front porch (sync offset) lines 4 lsbits (0–63)
Bits 3–0Vertical sync pulse width lines 4 lsbits (0–63)
11Bits 7–6Horizontal front porch (sync offset) pixels 2 msbits
Bits 5–4Horizontal sync pulse width pixels 2 msbits
Bits 3–2Vertical front porch (sync offset) lines 2 msbits
Bits 1–0Vertical sync pulse width lines 2 msbits
12Horizontal image size, mm, 8 lsbits (0–4095 mm, 161 in)
13Vertical image size, mm, 8 lsbits (0–4095 mm, 161 in)
14Bits 7–4Horizontal image size, mm, 4 msbits
Bits 3–0Vertical image size, mm, 4 msbits
15Horizontal border pixels (one side; total is twice this)
16Vertical border lines (one side; total is twice this)
17Features bitmap
Bit 7Interlaced
Bits 6–5Stereo mode: 00=No stereo; other values depend on bit 0:
Bit 0=0: 01=Field sequential, sync=1 during right; 10=similar, sync=1 during left; 11=4-way interleaved stereo
Bit 0=1: 01=Right image on even lines; 10=Left image on even lines; 11=side-by-side
Bit 4=0Analog sync.
If set, the following bit definitions apply:
Bit 3Sync type: 0=Analog composite; 1=Bipolar analog composite
Bit 2VSync serration (HSync during VSync)
Bit 1Sync on all 3 RGB lines (else green only)
Bits 4-3=10Digital composite (on HSync).
If set, the following bit definitions apply:
Bit 2Vertical sync polarity (0=negative, 1=positive)
Bit 1reserved
Bits 4-3=11Digital separate sync.
If set, the following bit definitions apply:
Bit 2VSync serration (HSync during VSync)
Bit 1Horizontal Sync polarity (0=negative, 1=positive)
Bit 02-way line-interleaved or side-by-side interleaved stereo, if bits 6–5 are not 00.

When used for another descriptor, the pixel clock and some other bytes are set to 0:

BytesDescription
0–1Zero, indicates not a detailed timing descriptor
2Zero
3Descriptor type. – currently defined. – reserved for vendors.
4Zero
5–17Defined by descriptor type. If text, code page 437 text, terminated (if less than 13 bytes) with LF and padded with SP.

Currently defined descriptor types are:

  • 0xFF: Display serial number (ASCII text)
  • 0xFE: Unspecified text (ASCII text)
  • 0xFD: Display range limits. 6- or 13-byte (with additional timing) binary descriptor.
  • 0xFC: Display name (ASCII text).
  • 0xFB: Additional white point data. 2× 5-byte descriptors, padded with .
  • 0xFA: Additional standard timing identifiers. 6× 2-byte descriptors, padded with .
  • 0xF9 Display Color Management (DCM).
  • 0xF8 CVT 3-Byte Timing Codes.
  • 0xF7 Additional standard timing 3.
  • 0x10 Dummy identifier.
  • 00-0x0Fh Manufacturer reserved descriptors.
BytesDescription
0–3Standard header, byte 3 = 0xFD.
4Offsets for display range limits
Bits 7–4Unused, must be 0.
Bits 3–2Horizontal rate offsets: 00=None, 10=+255 kHz for Max rate, 11=+255 kHz for Max and Min rates
Bits 1–0Vertical rate offsets: 00=None, 10=+255 Hz for Max rate, 11=+255 Hz for Max and Min rates
5Minimum vertical field rate (1–255 Hz) (256–512 Hz if offset)
6Maximum vertical field rate (1–255 Hz) (256–512 Hz if offset)
7Minimum horizontal line rate (1–255 kHz) (256–512 kHz if offset)
8Maximum horizontal line rate (1–255 kHz) (256–512 kHz if offset)
9Maximum pixel clock rate, rounded up to 10 MHz multiple (10–2550 MHz)
10Extended timing information type:

: Default GTF (when Basic display parameters byte 24 bit 0 is set.
: No timing information.
: Secondary GTF supported, parameters as follows.
: CVT (when Basic display parameters byte 24 bit 0 is set), parameters as follows.

11-17Video timing parameters (if byte 10 is or , padded with ).
BytesDescription
10
11Reserved, must be 0.
12Start frequency for secondary curve, divided by 2 kHz (0–510 kHz)
13GTF C value, multiplied by 2 (0–127.5)
14–15GTF M value (0–65535, little-endian)
16GTF K value (0–255)
17GTF J value, multiplied by 2 (0–127.5)
BytesDescription
10
11Bits 7–4CVT major version (1-15)
Bits 3–0CVT minor version (0-15)
12Bits 7–2Additional clock precision in 0.25 MHz increments
(to be subtracted from byte 9 Maximum pixel clock rate)
Bits 1–0Maximum active pixels per line, 2-bit msb
13Maximum active pixels per line, 8-bit lsb (no limit if 0)
14Aspect ratio bitmap
Bit 74:3
Bit 616:9
Bit 516:10
Bit 45:4
Bit 315:9
Bits 2–0Reserved, must be 0.
15Bits 7–5Aspect ratio preference: 000=4:3, 001=16:9, 010=16:10, 011=5:4, 100=15:9
Bit 4CVT-RB reduced blanking (preferred)
Bit 3CVT standard blanking
Bits 2–0Reserved, must be 0.
16Scaling support bitmap
Bit 7Horizontal shrink
Bit 6Horizontal stretch
Bit 5Vertical shrink
Bit 4Vertical stretch
Bits 3–0Reserved, must be 0.
17Preferred vertical refresh rate (1–255)
BytesDescription
0–4Standard header, byte 3 = 0xFB.
5White point index number (1–255) Usually 1; 0 indicates descriptor not used.
6White point CIE xy coordinates least-significant bits (like EDID byte 26)
Bits 7–4Unused, must be 0.
Bits 3–2White point x value least-significant 2 bits
Bits 1–0White point y value least-significant 2 bits
7White point x value most significant 8 bits (like EDID byte 27)
8White point y value most significant 8 bits (like EDID byte 28)
9datavalue = (gamma−1)×100 (1.0–3.54, like EDID byte 23)
10–14Second descriptor, like above. Index number usually 2.
15–17Unused, padded with .
BytesDescription
0–4Standard header, byte 3 = 0xF9.
5Version:
6Red a3 lsb
7Red a3 msb
8Red a2 lsb
9Red a2 msb
10Green a3 lsb
11Green a3 msb
12Green a2 lsb
13Green a2 msb
14Blue a3 lsb
15Blue a3 msb
16Blue a2 lsb
17Blue a2 msb
BytesDescription
0–4Standard header, byte 3 = 0xF8.
5Version:
6-8CVT timing descriptor #1
6Addressable lines 8-bit lsb
7Bits 7–4Addressable lines 4-bit msb
Bits 3–2Preferred vertical rate: 00=50 Hz, 01=60 Hz, 10=75 Hz, 11=85 Hz
Bits 1–0Unused, must be 0.
8Bit 7Unused, must be 0.
Bits 6–5Aspect ratio: 00=16:10; 01=4:3; 10=5:4; 11=16:9
Vertical rate bitmap
Bit 450 Hz CVT
Bit 360 Hz CVT
Bit 275 Hz CVT
Bit 185 Hz CVT
Bit 060 Hz CVT reduced blanking
9-11CVT timing descriptor #2
12-14CVT timing descriptor #3
15-17CVT timing descriptor #4
BytesDescription
0–4Standard header, byte 3 = 0xF7.
5Version:
6Bit 7640×350 @ 85 Hz
Bit 6640×400 @ 85 Hz
Bit 5720×400 @ 85 Hz
Bit 4640×480 @ 85 Hz
Bit 3848×480 @ 60 Hz
Bit 2800×600 @ 85 Hz
Bit 11024×768 @ 85 Hz,
Bit 01152×864 @ 85 Hz
7Bit 71280×768 @ 60 Hz (CVT-RB)
Bit 61280×768 @ 60 Hz
Bit 51280×768 @ 75 Hz
Bit 41280×768 @ 85 Hz
Bit 31280×960 @ 60 Hz
Bit 21280×960 @ 85 Hz
Bit 11280×1024 @ 60 Hz
Bit 01280×1024 @ 85 Hz
8Bit 71360×768 @ 60 Hz (CVT-RB)
Bit 61280×768 @ 60 Hz
Bit 51440×900 @ 60 Hz (CVT-RB)
Bit 41440×900 @ 75 Hz
Bit 31440×900 @ 85 Hz
Bit 21440×1050 @ 60 Hz (CVT-RB)
Bit 11440×1050 @ 60 Hz
Bit 01440×1050 @ 75 Hz
9Bit 71440×1050 @ 85 Hz
Bit 61680×1050 @ 60 Hz (CVT-RB)
Bit 51680×1050 @ 60 Hz
Bit 41680×1050 @ 75 Hz
Bit 31680×1050 @ 85 Hz
Bit 21600×1200 @ 60 Hz
Bit 11600×1200 @ 65 Hz
Bit 01600×1200 @ 70 Hz
10Bit 71600×1200 @ 75 Hz
Bit 61600×1200 @ 85 Hz
Bit 51792×1344 @ 60 Hz
Bit 41792×1344 @ 75 Hz
Bit 31856×1392 @ 60 Hz
Bit 21856×1392 @ 75 Hz
Bit 11920×1200 @ 60 Hz (CVT-RB)
Bit 01920×1200 @ 60 Hz
11Bit 71920×1200 @ 75 Hz
Bit 61920×1200 @ 75 Hz
Bit 51920×1440 @ 60 Hz
Bit 51920×1440 @ 75 Hz
Bits 3–0Unused, must be 0.
12-17Unused, must be 0.

EIA/CEA-861 extension block[edit]

The CEA EDID Timing Extension was first introduced in EIA/CEA-861, and has since been updated several times, most notably with the −861B revision (which was version 3 of the extension, adding Short Video Descriptors and advanced audio capability/configuration information), −861D (published in July 2006 and containing updates to the audio segments), −861E, and −861F which was published on June 4, 2013.[10] According to Brian Markwalter, senior vice president, research and standards, CEA, −861F "includes a number of noteworthy enhancements, including support for several new Ultra HD and widescreen video formats and additional colorimetry schemes.”[11]

The most recent version, CTA-861-G[12], originally published in November 2016, was made available for free in November 2017 after some necessary changes due to a trademark complaint.

Version 1 (as defined in −861) allowed the specification of video timings only through the use of 18-byte Detailed Timing Descriptors (DTD) (as detailed in EDID 1.3 data format above). In all cases, the "preferred" timing should be the first DTD listed in a CEA EDID Timing Extension.

Version 2 (as defined in −861A) added the capability to designate a number of DTDs as "native" and also included some "basic discovery" functionality for whether the display device contains support for "basic audio", YCbCr pixel formats, and underscan.

Version 3 (from the −861B spec) allows two different ways to specify the timings of available digital TV[clarification needed] formats: As in Version 1 & 2 by the use of 18-byte DTDs, or by the use of the Short Video Descriptor (SVD) (see below). HDMI 1.0 -1.3c uses this[which?] version.

Version 3 also includes four new optional types of data blocks: Video Data Blocks containing the aforementioned Short Video Descripter (SVD), Audio Data Blocks containing Short Audio Descriptors (SAD), Speaker Allocation Data Blocks containing information about the speaker configuration of the display device, and Vendor Specific Data Blocks which can contain information specific to a given vendor's use.

CEA EDID Timing Extension data format - Version 3[edit]

Byte sequence 00: Extension tag (which kind of extension block this is); 02h for CEA EDID 01: Revision number (Version number); 03h for Version 3 02: Byte number (decimal) within this block where the 18-byte DTDs begin. If no non-DTD data is present in this extension block, the value should be set to 04h (the byte after next). If set to 00h, there are no DTDs present in this block and no non-DTD data. 03: Number of Native DTDs present, other Version 2+ information bit 7: 1 if display supports underscan, 0 if not bit 6: 1 if display supports basic audio, 0 if not bit 5: 1 if display supports YCbCr 4:4:4, 0 if not bit 4: 1 if display supports YCbCr 4:2:2, 0 if not bit 3..0: total number of native formats in the DTDs included in this block 04: Start of Data Block Collection. If byte 02 is set to 04h, this is where the DTD collection begins. If byte 02 is set to another value, byte 04 is where the Data Block Collection begins, and the DTD collection follows immediately thereafter. The Data Block Collection contains one or more data blocks detailing video, audio, and speaker placement information about the display. The blocks can be placed in any order, and the initial byte of each block defines both its type and its length: bit 7..5: Block Type Tag (1 is audio, 2 is video, 3 is vendor specific, 4 is speaker allocation, all other values Reserved) bit 4..0: Total number of bytes in this block following this byte Once one data block has ended, the next byte is assumed to be the beginning of the next data block. This is the case until the byte (designated in Byte 02, above) where the DTDs are known to begin. '''Audio Data Blocks''' contain one or more 3-byte Short Audio Descriptors (SADs). Each SAD details audio format, channel number, and bitrate/resolution capabilities of the display as follows: SAD Byte 1 (format and number of channels): bit 7: Reserved (0) bit 6..3: Audio format code 1 = Linear Pulse Code Modulation (LPCM) 2 = AC-3 3 = MPEG1 (Layers 1 and 2) 4 = MP3 5 = MPEG2 6 = AAC 7 = DTS 8 = ATRAC 0, 15: Reserved 9 = One-bit audio aka SACD 10 = DD+ 11 = DTS-HD 12 = MLP/Dolby TrueHD 13 = DST Audio 14 = Microsoft WMA Pro bit 2..0: number of channels minus 1 (i.e. 000 = 1 channel; 001 = 2 channels; 111 = 8 channels) SAD Byte 2 (sampling frequencies supported): bit 7: Reserved (0) bit 6: 192kHz bit 5: 176kHz bit 4: 96kHz bit 3: 88kHz bit 2: 48kHz bit 1: 44kHz bit 0: 32kHz SAD Byte 3 (bitrate): For LPCM, bits 7:3 are reserved and the remaining bits define bit depth bit 2: 24 bit bit 1: 20 bit bit 0: 16 bit For all other sound formats, bits 7..0 designate the maximum supported bitrate divided by 8 kbit/s. '''Video Data Blocks''' will contain one or more 1-byte Short Video Descriptors (SVDs). They are decoded as follows: bit 7: 1 to designate that this should be considered a "native" resolution, 0 for non-native bit 6..0: index value to a table of standard resolutions/timings from CEA/EIA-861: VIC Display Pixel Pixel Short Aspect Aspect Clock, Name Ratio Ratio MHz V mode @ H 1 DMT0659 4:3 25.175 640x480p @ 59.94/60 Hz 2 480p 4:3 8:9 27.0 720x480p @ 59.94/60 Hz 3 480pH 16:9 32:37 27.0 720x480p @ 59.94/60 Hz 4 720p 16:9 1:1 74.25 1280x720p @ 59.94/60 Hz 5 1080i 16:9 1:1 74.25 1920x1080i @ 59.94/60 Hz 6 480i 4:3 8:9 27.0 720(1440)x480i @ 59.94/60 Hz 7 480iH 16:9 32:37 27.0 720(1440)x480i @ 59.94/60 Hz 8 240p 4:3 8:9 27.0 720(1440)x240p @ 59.94/60 Hz 9 240pH 16:9 32:37 27.0 720(1440)x240p @ 59.94/60 Hz 10 480i4x 4:3 8:9 54.0 (2880)x480i @ 59.94/60 Hz 11 480i4xH 16:9 32:37 54.0 (2880)x480i @ 59.94/60 Hz 12 240p4x 4:3 8:9 54.0 (2880)x240p @ 59.94/60 Hz 13 240p4xH 16:9 32:37 54.0 (2880)x240p @ 59.94/60 Hz 14 480p2x 4:3 8:9 54.0 1440x480p @ 59.94/60 Hz 15 480p2xH 16:9 32:37 54.0 1440x480p @ 59.94/60 Hz 16 1080p 16:9 1:1 148.5 1920x1080p @ 59.94/60 Hz 17 576p 4:3 16:15 27.0 720x576p @ 50 Hz 18 576pH 16:9 64:45 27.0 720x576p @ 50 Hz 19 720p50 16:9 1:1 74.25 1280x720p @ 50 Hz 20 1080i25 16:9 1:1 74.25 1920x1080i @ 50 Hz* 21 576i 4:3 16:15 27.0 720(1440)x576i @ 50 Hz 22 576iH 16:9 64:45 27.0 720(1440)x576i @ 50 Hz 23 288p 4:3 16:15 27.0 720(1440)x288p @ 50 Hz 24 288pH 16:9 64:45 27.0 720(1440)x288p @ 50 Hz 25 576i4x 4:3 16:15 54.0 (2880)x576i @ 50 Hz 26 576i4xH 16:9 64:45 54.0 (2880)x576i @ 50 Hz 27 288p4x 4:3 16:15 54.0 (2880)x288p @ 50 Hz 28 288p4xH 16:9 64:45 54.0 (2880)x288p @ 50 Hz 29 576p2x 4:3 16:15 54.0 1440x576p @ 50 Hz 30 576p2xH 16:9 64:45 54.0 1440x576p @ 50 Hz 31 1080p50 16:9 1:1 148.5 1920x1080p @ 50 Hz 32 1080p24 16:9 1:1 74.25 1920x1080p @ 23.98/24 Hz 33 1080p25 16:9 1:1 74.25 1920x1080p @ 25 Hz 34 1080p30 16:9 1:1 74.25 1920x1080p @ 29.97/30 Hz 35 480p4x 4:3 8:9 108.0 (2880)x480p @ 59.94/60 Hz 36 480p4xH 16:9 32:37 108.0 (2880)x480p @ 59.94/60 Hz 37 576p4x 4:3 16:15 108.0 (2880)x576p @ 50 Hz 38 576p4xH 16:9 64:45 108.0 (2880)x576p @ 50 Hz 39 1080i25 16:9 1:1 72.0 1920x1080i (1250 Total) @ 50 Hz* 40 1080i50 16:9 1:1 148.5 1920x1080i @ 100 Hz 41 720p100 16:9 1:1 148.5 1280x720p @ 100 Hz 42 576p100 4:3 8:9 54.0 720x576p @ 100 Hz 43 576p100H 16:9 32:37 54.0 720x576p @ 100 Hz 44 576i50 4:3 16:15 54.0 720(1440)x576i @ 100 Hz 45 576i50H 16:9 64:45 54.0 720(1440)x576i @ 100 Hz 46 1080i60 16:9 1:1 148.5 1920x1080i @ 119.88/120 Hz 47 720p120 16:9 1:1 148.5 1280x720p @ 119.88/120 Hz 48 480p119 4:3 16:15 54.0 720x480p @ 119.88/120 Hz 49 480p119H 16:9 64:45 54.0 720x480p @ 119.88/120 Hz 50 480i59 4:3 8:9 54.0 720(1440)x480i @ 119.88/120 Hz 51 480i59H 16:9 32:37 54.0 720(1440)x480i @ 119.88/120 Hz 52 576p200 4:3 16:15 108.0 720x576p @ 200 Hz 53 576p200H 16:9 64:45 108.0 720x576p @ 200 Hz 54 576i100 4:3 16:15 108.0 720(1440)x576i @ 200 Hz 55 576i100H 16:9 64:45 108.0 720(1440)x576i @ 200 Hz 56 480p239 4:3 8:9 108.0 720x480p @ 239.76/240 Hz 57 480p239H 16:9 32:37 108.0 720x480p @ 239.76/240 Hz 58 480i119 4:3 8:9 108.0 720(1440)x480i @ 239.76/240 Hz 59 480i119H 16:9 32:37 108.0 720(1440)x480i @ 239.76/240 Hz 60 720p24 16:9 1:1 59.4 1280x720p @ 23.98/24 Hz 61 720p25 16:9 1:1 74.25 1280x720p @ 25Hz 62 720p30 16:9 1:1 74.25 1280x720p @ 29.97/30 Hz 63 1080p120 16:9 1:1 297.0 1920x1080p @ 119.88/120 Hz 64 1080p100 16:9 1:1 297.0 1920x1080p @ 100 Hz 65 720p24 64:27 4:3 59.4 1280x720p @ 23.98/24 Hz 66 720p25 64:27 4:3 74.25 1280x720p @ 25Hz 67 720p30 64:27 4:3 74.25 1280x720p @ 29.97/30 Hz 68 720p50 64:27 4:3 74.25 1280x720p @ 50 Hz 69 720p 64:27 4:3 74.25 1280x720p @ 59.94/60 Hz 70 720p100 64:27 4:3 148.5 1280x720p @ 100 Hz 71 720p120 64:27 4:3 148.5 1280x720p @ 119.88/120 Hz 72 1080p24 64:27 4:3 74.25 1920x1080p @ 23.98/24 Hz 73 1080p25 64:27 4:3 74.25 1920x1080p @ 25Hz 74 1080p30 64:27 4:3 74.25 1920x1080p @ 29.97/30 Hz 75 1080p50 64:27 4:3 148.5 1920x1080p @ 50 Hz 76 1080p 64:27 4:3 148.5 1920x1080p @ 59.94/60 Hz 77 1080p100 64:27 4:3 297.0 1920x1080p @ 100 Hz 78 1080p120 64:27 4:3 297.0 1920x1080p @ 119.88/120 Hz 79 720p2x24 64:27 64:63 59.4 1680x720p @ 23.98/24 Hz 80 720p2x25 64:27 64:63 59.4 1680x720p @ 25Hz 81 720p2x30 64:27 64:63 59.4 1680x720p @ 29.97/30 Hz 82 720p2x50 64:27 64:63 82.5 1680x720p @ 50 Hz 83 720p2x 64:27 64:63 99.0 1680x720p @ 59.94/60 Hz 84 720p2x100 64:27 64:63 165.0 1680x720p @ 100 Hz 85 720p2x120 64:27 64:63 198.0 1680x720p @ 119.88/120 Hz 86 1080p2x24 64:27 1:1 99.0 2560x1080p @ 23.98/24 Hz 87 1080p2x25 64:27 1:1 90.0 2560x1080p @ 25Hz 88 1080p2x30 64:27 1:1 118.8 2560x1080p @ 29.97/30 Hz 89 1080p2x50 64:27 1:1 185.625 2560x1080p @ 50 Hz 90 1080p2x 64:27 1:1 198.0 2560x1080p @ 59.94/60 Hz 91 1080p2x100 64:27 1:1 371.25 2560x1080p @ 100 Hz 92 1080p2x120 64:27 1:1 495.0 2560x1080p @ 119.88/120 Hz 93 2160p24 16:9 1:1 297.0 3840x2160p @ 23.98/24 Hz 94 2160p25 16:9 1:1 297.0 3840x2160p @ 25Hz 95 2160p30 16:9 1:1 297.0 3840x2160p @ 29.97/30 Hz 96 2160p50 16:9 1:1 594.0 3840x2160p @ 50 Hz 97 2160p 16:9 1:1 594.0 3840x2160p @ 59.94/60 Hz 98 2160p24 256:135 1:1 297.0 4096x2160p @ 23.98/24 Hz 99 2160p25 256:135 1:1 297.0 4096x2160p @ 25Hz 100 2160p30 256:135 1:1 297.0 4096x2160p @ 29.97/30 Hz 101 2160p50 256:135 1:1 594.0 4096x2160p @ 50 Hz 102 2160p 256:135 1:1 594.0 4096x2160p @ 59.94/60 Hz 103 2160p24 64:27 4:3 297.0 3840x2160p @ 23.98/24 Hz 104 2160p25 64:27 4:3 297.0 3840x2160p @ 25Hz 105 2160p30 64:27 4:3 297.0 3840x2160p @ 29.97/30 Hz 106 2160p50 64:27 4:3 594.0 3840x2160p @ 50 Hz 107 2160p 64:27 4:3 594.0 3840x2160p @ 59.94/60 Hz 108 720p48 16:9 1:1 90.0 1280x720p @ 47.96/48 Hz 109 720p48 64:27 1:1 90.0 1280x720p @ 47.96/48 Hz 110 720p2x48 64:27 64:63 99.0 1680x720p @ 47.96/48 Hz 111 1080p48 16:9 1:1 148.5 1920x1080p @ 47.96/48 Hz 112 1080p48 64:27 4:3 148.5 1920x1080p @ 47.96/48 Hz 113 1080p2x48 64:27 1:1 198.0 2560x1080p @ 47.96/48 Hz 114 2160p48 16:9 1:1 594.0 3840x2160p @ 47.96/48 Hz 115 2160p48 256:135 1:1 594.0 4096x2160p @ 47.96/48 Hz 116 2160p48 64:27 4:3 594.0 3840x2160p @ 47.96/48 Hz 117 2160p100 16:9 1:1 1188.0 3840x2160p @ 100 Hz 118 2160p120 16:9 1:1 1188.0 3840x2160p @ 119.88/120 Hz 119 2160p100 64:27 4:3 1188.0 3840x2160p @ 100 Hz 120 2160p120 64:27 4:3 1188.0 3840x2160p @ 119.88/120 Hz 121 2160p2x24 64:27 1:1 396.0 5120x2160p @ 23.98/24 Hz 122 2160p2x25 64:27 1:1 396.0 5120x2160p @ 25Hz 123 2160p2x30 64:27 1:1 396.0 5120x2160p @ 29.97/30 Hz 124 2160p2x48 64:27 1:1 742.5 5120x2160p @ 47.96/48 Hz 125 2160p2x50 64:27 1:1 742.5 5120x2160p @ 50 Hz 126 2160p2x 64:27 1:1 742.5 5120x2160p @ 59.94/60 Hz 127 2160p2x100 64:27 1:1 1485.0 5120x2160p @ 100 Hz 193 2160p2x120 64:27 1:1 1485.0 5120x2160p @ 119.88/120 Hz 194 4320p24 16:9 1:1 1188.0 7680x4320p @ 23.98/24 Hz 195 4320p25 16:9 1:1 1188.0 7680x4320p @ 25Hz 196 4320p30 16:9 1:1 1188.0 7680x4320p @ 29.97/30 Hz 197 4320p48 16:9 1:1 2376.0 7680x4320p @ 47.96/48 Hz 198 4320p50 16:9 1:1 2376.0 7680x4320p @ 50 Hz 199 4320p 16:9 1:1 2376.0 7680x4320p @ 59.94/60 Hz 200 4320p100 16:9 1:1 4752.0 7680x4320p @ 100 Hz 201 4320p120 16:9 1:1 4752.0 7680x4320p @ 119.88/120 Hz 202 4320p24 64:27 4:3 1188.0 7680x4320p @ 23.98/24 Hz 203 4320p25 64:27 4:3 1188.0 7680x4320p @ 25Hz 204 4320p30 64:27 4:3 1188.0 7680x4320p @ 29.97/30 Hz 205 4320p48 64:27 4:3 2376.0 7680x4320p @ 47.96/48 Hz 206 4320p50 64:27 4:3 2376.0 7680x4320p @ 50 Hz 207 4320p 64:27 4:3 2376.0 7680x4320p @ 59.94/60 Hz 208 4320p100 64:27 4:3 4752.0 7680x4320p @ 100 Hz 209 4320p120 64:27 4:3 4752.0 7680x4320p @ 119.88/120 Hz 210 4320p2x24 64:27 1:1 1485.0 10240x4320p @ 23.98/24 Hz 211 4320p2x25 64:27 1:1 1485.0 10240x4320p @ 25Hz 212 4320p2x30 64:27 1:1 1485.0 10240x4320p @ 29.97/30 Hz 213 4320p2x48 64:27 1:1 2970.0 10240x4320p @ 47.96/48 Hz 214 4320p2x50 64:27 1:1 2970.0 10240x4320p @ 50 Hz 215 4320p2x 64:27 1:1 2970.0 10240x4320p @ 59.94/60 Hz 216 4320p2x100 64:27 1:1 5940.0 10240x4320p @ 100 Hz 217 4320p2x120 64:27 1:1 5940.0 10240x4320p @ 119.88/120 Hz 218 2160p100 256:135 1:1 1188.0 4096x2160p @ 100 Hz 219 2160p120 256:135 1:1 1188.0 4096x2160p @ 119.88/120 Hz *Short video descriptors 20 & 39 are both 1920x1080i@50 16:9 but differ in the amount of vertical total lines which are 1125 and 1250, respectively. Notes: Parentheses indicate instances where pixels are repeated to meet the minimum speed requirements of the interface. For example, in the 720X240p case, the pixels on each line are double-clocked. In the (2880)X480i case, the number of pixels on each line, and thus the number of times that they are repeated, is variable, and is sent to the DTV monitor by the source device. Increased Hactive expressions include “2x” and “4x” indicate two and four times the reference resolution, respectively. The CEA/EIA-861/A standard included only numbers 1-7 and numbers 17-22 above (but not as short video descriptors which were introduced in CEA/EIA-861B) and are considered primary video format timings. The CEA/EIA-861B standard has the first 34 short video descriptors above. It is used by HDMI 1.0-1.2a. The CEA/EIA-861C standard has the first 59 short video descriptors above. It is used by HDMI 1.3-1.3c The CEA/EIA-861D standard has the first 64 short video descriptors above. It is used by HDMI 1.4-1.4b The CEA/EIA-861E standard has the first 107 short video descriptors above. It is used by HDMI 2.0-2.0b The CTA-861F standard has the first 193 short video descriptors above. It is used by HDMI 2.1 The CTA-861G standard has the full 219 short video descriptors above. It is used by HDMI 2.1 A '''Vendor Specific Data Block''' (if any) contains as its first three bytes the vendor's IEEE 24-bit registration number, LSB first. For HDMI, it is always 00-0C-03 for HDMI Licensing, LLC. It is followed by a two byte source physical address, LSB first. The source physical address provides the CEC physical address for upstream CEC devices. The remainder of the Vendor Specific Data Block is the "data payload",which can be anything the vendor considers worthy of inclusion in this EDID extension block. HDMI 1.3a specifies some requirements for the data payload. See that spec for detailed info on these bytes: VSD Byte 1-3 IEEE Registration Identifier (LSB First) VSD Byte 4-5 Components of Source Physical Address (See section 8.7 of HDMI 1.3a) VSD Byte 6 (optional) (bits are set if sink supports...): bit 7: Supports_AI (...a function that needs info from ACP or ISRC packets) bit 6: DC_48bit (...16-bit-per-channel deep color) bit 5: DC_36bit (...12-bit-per-channel deep color) bit 4: DC_30bit (...10-bit-per-channel deep color) bit 3: DC_Y444 (...4:4:4 in deep color modes) bit 2: Reserved (0) bit 1: Reserved (0) bit 0: DVI_Dual (...DVI Dual Link Operation) VSD Byte 7 (optional) If non-zero (Max_TMDS_Frequency / 5mhz) VSD Byte 8 (optional) (latency fields indicators): bit 7: latency_fields (set if latency fields are present) bit 6: i_latency_fields (set if interlaced latency fields are present; if set four latency fields will be present, 0 if bit 7 is 0) bits 5-0: Reserved (0) VSD Byte 9 (optional) Video Latency (if indicated, value=1+ms/2 with a max of 251 meaning 500ms) VSD Byte 10 (optional) Audio Latency (video delay for progressive sources, same units as above) VSD Byte 11 (optional) Interlaced Video Latency (if indicated, same units as above) VSD Byte 12 (optional) Interlaced Audio Latency (video delay for interlaced sources, same units as above) Additional bytes may be present, but the HDMI spec says they shall be zero. If a Speaker Allocation Data Block is present, it will consist of three bytes. The second and third are Reserved (all 0), but the first contains information about which speakers are present in the display device: bit 7: Reserved (0) bit 6: Rear Left Center / Rear Right Center present for 1, absent for 0 bit 5: Front Left Center / Front Right Center present for 1, absent for 0 bit 4: Rear Center present for 1, absent for 0 bit 3: Rear Left / Rear Right present for 1, absent for 0 bit 2: Front Center present for 1, absent for 0 bit 1: LFE present for 1, absent for 0 bit 0: Front Left / Front Right present for 1, absent for 0 Note that for speakers with right and left polarity, it is assumed that both left and right are present. "d": byte (designated in byte 02) where DTDs begin. 18-byte DTD strings continue for an unspecified length (modulo 18) until a "00 00" is as the first bytes of a prospective DTD. At this point, the DTDs are known to be complete, and the start address of the "00 00" can be considered to be "XX" (see below) "XX"-126: Post-DTD padding. Should be populated with 00h 127: Checksum - This byte must be programmed such that the sum of all 128 bytes equals 00h.

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